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Breaking the Limits of Ferroelectric Materials, Leading the New Wave in Semiconductor Technology

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Breaking the Limits of Ferroelectric Materials, Leading the New Wave in Semiconductor Technology
Breaking the Limits of Ferroelectric Materials, Leading the New Wave in Semiconductor Technology

Professor Yann-Wen Lan and Professor Ting-Hua Lu from Department of Physics, National Taiwan Normal University formed a collaborative research team, joining forces with Associate Professor Chun-Liang Lin from National Yang-Ming Chiao-Tung University, Professor Yi-Chun Chen from National Cheng Kung University, Pro-fessor Min-Hung Lee from National Taiwan University, and Taiwan Semiconductor Research Center Chief Li Kai-Shin, supported by the National Science and Technol-ogy Council, has successfully developed an innovative ferroelectric transistor (ST-3R MoS2 FeS-FET) via two-dimensional material molybdenum disulfide. This breakthrough in the field of ferroelectric materials addresses the challenges of shrinking the size and reducing the power consumption of traditional ferroelectric transistors. The newly created ferroelectric semiconductor device has a thickness of only two atomic layers (1.3 nm) and operates at a low voltage range. It is poised to be applied in non-volatile memory and low-power electronic components for in-memory computing, with the potential to become a core technology in ad-vanced semiconductor applications, enhancing Taiwan's international competi-tiveness in the semiconductor industry. The research findings were officially pub-lished in the prestigious academic journal Nature Electronics in late November this year.

Moore's Law indicates that the number of components that can be accommo-dated on an integrated circuit will exponentially increase over time. Semiconduc-tor technology has rapidly developed in accordance with Moore's Law, driving technological innovations, societal changes, and the growth of the world econo-my. However, the semiconductor industry continually reduces the size of compo-nents due to the rising demand for computational speed in technology, approach-ing the physical limits of silicon materials. Challenges such as lowering power con-sumption and heat dissipation are gradually becoming more prominent. The cur-rent goal is to find suitable new technologies to achieve efficient computation in smaller spaces while being able to drive components with lower energy.

A ferroelectric transistor utilizes ferroelectric materials with reversible electric polarization. By applying an external electric field, the direction of the internal electric polarization can be flipped, providing the device with memory unit func-tionality. Ferroelectric materials offer extremely high read and write speeds and can maintain electric polarization states even in power-off situations, making fer-roelectric transistors an optimal choice for new non-volatile memory units. How-ever, the development of ferroelectric transistors faces numerous obstacles and difficulties. Traditional ferroelectric transistors using perovskite ferroelectric mate-rials exhibit unstable polarization as the size of the transistor decreases, and the manufacturing process is highly complex. Consequently, researchers have shifted their focus to two-dimensional materials, which are anticipated to possess ferroe-lectric properties, and have initiated extensive investigations. Although many stud-ies have successfully applied two-dimensional materials to ferroelectric transistors, it still requires further effort to achieve lower power consumption, lower read/write voltage, and process steps more in line with industrial standards in or-der to meet future market demands.

The research team led by Professor Yan-Wen Lan, with Dr. Hong-Wei Yang and Dr. Bo-Wei Liang as the main experimental researchers, has developed a shear-induced rhombohedral stacking molybdenum disulfide ferroelectric transistor (ST-3R MoS2 FeS-FET) with the support of funding from the National Science and Technology Commission and National Taiwan Normal University. Bilayer ST-3R MoS2 with interfacial ferroelectricity is grown using chemical vapor deposition (CVD). The sliding phenomenon between the bilayer ST-3R MoS2, generated by the mobile domain boundaries constructed during the growing process, exhibits reversible switching of spontaneous electric polarization in the out-of-plane direc-tion. This emerging ferroelectric transistor demonstrates remarkable low read/write voltages、high-speed operation and high stability. Moreover, its manu-facturing process utilizes widely applied techniques in the industry, showcasing high compatibility with industrial standards.

Furthermore, by applying ferroelectric two-dimensional materials to the semi-conductor part of the field-effect transistor (FeS-FET), this approach addresses the charge-trapping problem of traditional ferroelectric transistors (Fe-FET) that use ferroelectric materials as insulators, and improve the carrier mobility of the device by leveraging the excellent properties of two-dimensional materials. The atomic-scale channel thickness is a significant advantage in current technological devel-opment. It is essential to minimize the short-channel effects and achieve low OFF-state leakage current, ensuring excellent gate control for large-scale integration and data storage applications. This reveals the great potential for ST-3R MoS2 FeS-FET to become a linchpin at the sub-3nm technology node, providing an ideal so-lution for advanced semiconductor processes.

Sources: National Science and Technology Council

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